An embodiment of the present invention relates generally to a semiconductor device and a method for fabricating the same, and more particularly to a semiconductor device that comprises a gate spacer of a high K material and a method for fabricating the same.
A dynamic random access memory (DRAM) device includes a plurality of unit cells each having a capacitor and a transistor. The capacitor is used to temporarily store data, and the transistor is used to transfer data between a bit line and the capacitor in response to a control signal (word line). The data transfer occurs by using a semiconductor property of changing electrical conductivity depending on external conditions. A transistor has three regions of gate, source, and drain. Electric charges move between the source and drain based on the control signal at the transistor gate. The moving electric charges between the source and drain flow through a channel region having the semiconductor property.
In a conventional method for manufacturing a transistor, a gate is formed in a semiconductor substrate, and source and drain are formed by doping impurities into the semiconductor substrate on the sides of the gate. The channel region of a transistor is located under the gate between the source and drain of the transistor. The transistor having a horizontal channel region occupies a predetermined area of a semiconductor substrate. A large number of transistors are needed in a complicated or highly integrated semiconductor memory device, which often makes it difficult to reduce the total area of the semiconductor memory device.
Reducing the total area of a semiconductor memory device leads to an increased number of semiconductor memory devices manufactured per wafer, thereby improving productivity. A conventional method proposes to replace a conventional planar gate having a horizontal channel region with a recess gate in which a recess is formed in a substrate and a channel region along a curved surface of the recess by forming a gate in the recess or with a 3-dimensional transistor that increases the channel area.